IJICA

Design of Cognitive Radios

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Abstract

Cognitive radios are expected to perform spectrum sensing and communication in the frequency range of tens of megahertz to about 10 GHz. As such, they pose tough architecture and circuit design problems. This paper deals with issues such as broadband, low-noise amplification, multidecade carrier frequency synthesis, and spectrum sensing. The paper also describes the effect of nonlinearity and local oscillator harmonics, demonstrating that cognitive radios entail more difficult challenges than do software-defined radios. Multi-decade synthesis techniques and RF-assisted sensing methods are also presented.

Recommended Citation

[1] J. Mitola and G. Q. Maquire, “ Cognitive radio: making

software radiosmore personal,” IEEE Personal Communications, vol.

6, pp. 13-18, Aug. 1999. Mitola, J., IIIMaguire, G.Q., Jr.

[2] S. Haykin, “ Cognitive radio: brain-empowered wireless

communications,” IEEE J. Selected Areas in Communications,vol. 23,

pp. 201-220, Fe. 2005.

[3] J. Park et al, “A Fully-Integrated UHF Receiver withMulti-

Resolution Spectrum-Sensing (MRSS) Functionality for IEEE 802.22

Cognitive-Radio Applications,”ISSCC Dig. Tech. papers, pp. 526-527,

Feb. 2008.

[4] S. Shekhar, X. Li, and D. J. Allstot, “ A Fully-IntegratedUHF

Receiver with Multi-Resolution Spectrum-Sensing (MRSS)

Functionality for IEEE 802.22 Cognitive-Radio Applications,” RFIC

Symp. Dig. Tech. Papers, June

2006.

[5] B. Razavi, “Design of Millimeter-Wave CMOS Radios:A Tutorial,”

IEEE Trans. Circuits and Systems - Part I, vol. 56, pp. 4-16, Jan. 2009.

[6] F. Bruccoleri, E. A. M. Klumpernink, and B. Nauta,

“Wide-band CMOS low-noise amplifier exploiting thermal

noise canceling,” IEEE J. Solid-State Circuits, vol.

39, pp. 275-282, Feb. 2004.

[7] D. Manstretta, M. Brandolini, and F. Svelto, “Secondorder

intermodulation mechanisms in CMOS downconverters,” IEEE J.

Solid-State Circuits, vol. 38, pp. 394- 406, March 2003.

[8] M. Brandolini et al, “ A +78 dBm IIP2 CMOS direct

downconversion mixer for fully integrated UMTS receivers,” IEEE J.

Solid-State Circuits, vol. 41, pp. 552-559, March 2006.

[9] Z. Ru et al, “A Software-Defined Radio Receiver Architecture

Robust toOut-of-Band Interference,” ISSCCDig. Tech. papers, pp. 230-

231, Feb. 2009.

[10] N. A. Moseley et al, “A 400-to-900 MHz Receiver with Dual-

Domain Harmonic Rejection Exploiting Adaptive Interference

Cancellation,” ISSCCDig. Tech. papers, pp. 232-233, Feb. 2009.

[11] J. A. Weldon et al, “A 1.75-GHz highly integrated

narrow-band CMOS transmitterwith harmonic-rejection

mixers,” IEEE J. Solid-State Circuits, vol. 36, pp. 2003-

2015, Dec. 2001.

[12] H.-H. Hsieh and L. H. Lu, “A 63-GHz VCO in 0.18-_m CMOS

Technology,” Symposium on VLSI Circuits Dig.

Of Tech. Papers, pp. 178-179, June 2007.

[13] K.-H. Tsai et al, “3.5mW W-Band Frequency Divider

withWide Locking Range in 90nm CMOS Technology,”

ISSCC Dig. Tech. Papers, pp. 466-467, Feb. 2008.

[14] B. Razavi, “A Millimeter-Wave Circuit Technique,”

IEEE J. Solid-State Circuits, vol. 43, pp. 477-485, Sept.

2008.